1. Field of the Invention
The present invention relates to a demodulator for demodulating a phase-modulated signal such as a QPSK (quadrature phase shift keying) signal or the like.
2. Description of the Related Art
In communication systems such as a mobile telephone system or the like, one proposed communication system effects communication by utilizing phase-modulated digital data such as a .pi./4 shift DQPSK modulation (.pi./4 shift differential QPSK modulation) data or the like.
In the .pi./4 shift DQPSK modulation, differentiated two-series data are converted into phase information by a complex calculation and then a modulated signal is generated. As, for example, shown in FIG. 1 of the accompanying drawings, two-series data (X.sub.K, Y.sub.K) are converted into phase data .theta..sub.K by a four-level phase converter and then transmitted. If the .pi./4 shift DQPSK modulation is carried out, then digital data can be transmitted efficiently. U.S. Pat. No. 5,020,076 to Stephan V. Cahill et al. describes a circuit arrangement of a .pi./4 shift QPSK modulator, for example.
FIG. 2 shows an example of a circuit arrangement of a phase detector circuit in a demodulator for demodulating a .pi./4 shift DQPSK modulated wave. As shown in FIG. 2, a .pi./4 shift DQPSK modulated signal cos(.omega..sub.0 t+.theta..sub.(t)) supplied to an input terminal 1 is supplied to two mixers 2 and 3 which construct an orthogonal detector. Demodulation signals sin.omega..sub.0 t and cos.omega..sub.0 t applied to terminals 4 and 5 are mixed and orthogonally detected by the two mixers 2, 3, thereby generating I channel and Q channel detected signals I.sub.(t) =cos.theta..sub.(t) and Q.sub.(t) =sin.theta..sub.(t). The detected signals I.sub.(t) and Q.sub.(t) are supplied to low-pass filters (LPFs) 6 and 7, in which DC (direct current) offset amounts thereof are adjusted, respectively. Outputs of the low-pass filters 6, 7 are supplied to analog-to-digital (A/D) converters 8, 9, respectively. The A/D converters 8, 9 generate I-channel and Q-channel data I.sub.K and Q.sub.K from digital data output in response to a sampling clock supplied to a terminal 10. The I-channel and Q-channel data I.sub.K and Q.sub.K are supplied to a phase calculating circuit 11 which then supplies phase data .theta..sub.K corresponding to the I-channel and Q-channel data I.sub.K and Q.sub.K to an output terminal 12.
FIG. 3 shows a circuit arrangement which can detect only a phase. As shown in FIG. 3, a .pi./4 shift DQPSK modulation signal cos(.omega..sub.0t +.theta..sub.(t)) is supplied to an FM detector 22. A detected output d(.theta..sub.(t)) of the FM detector 22 is supplied to an integrating circuit 23. Data integrated by the integrating circuit 23 is supplied to an A/D converter 24 which derives a phase value. The same clock applied to a terminal 25 is supplied to the integrating circuit 23 and the A/D converter 24 so that the integrating circuit 23 and the A/D converter 24 are controlled at the same timing. Consequently, the A/D converter 24 supplies phase data .theta..sub.K to an output terminal 26.
FIG. 4 shows an example of a circuit arrangement of a clock extracting circuit that constructs a demodulating apparatus for detecting a .pi./4 shift DQPSK modulated wave. As shown in FIG. 4, a .pi./4 shift DQPSK modulated signal applied to an input terminal 100 is supplied to a detecting circuit 200 such as a delay detector or the like. Data detected by the detecting circuit 200 is supplied to an output terminal 300. A modulated signal (see FIG. 5A) supplied to the input terminal 100 is supplied to an envelope detector 400 which detects an envelope of a modulated signal as shown in FIG. 5B. This envelope information is supplied to a PLL (phase-locked loop) circuit 500. The PLL circuit 500 extracts a clock component as shown in FIG. 5C. The clock component thus extracted is supplied to the detecting circuit 200 which detects the .pi./4 shift DQPSK modulated wave on the basis of the clock component supplied thereto. The clock component is extracted by effectively utilizing the fact that the envelope of the modulated signal is changed in response to a symbol rate of data. The PLL circuit 500 may be replaced with a band-pass filter.